Manufacturing of integrated circuits is historically a procedure of forming thin films and layers of various materials on wafers of base semiconductor material, and then selectively removing areas of the films to provide structures and circuitry. Doped silicon is a typical base wafer material, and in various process schemes, metal layers are formed on the doped silicon or on polysilicon or silicon oxide formed from the base material.
It is well-known in the art that there are certain properties of thin films that are more-or-less universally desirable. For example, it is desirable that applied films in semiconductor manufacturing, and generally in all sorts of film deposition, exhibit good adhesion to the surfaces they are applied upon. Another generally desirable characteristic, related to adhesion, is low as-deposited film stress. Although many films are annealed after deposition, the temperature and time required for annealing, and even the stress level to which a film may be reduced by annealing, may be strongly effected by the as-deposited film stress. Also, highly stressed films may deform and separate from the underlying layers before annealing can be effectively accomplished.
There are a number of well-developed technologies for deposition of materials in the ultra-thin layers required for IC fabrication schemes. The deposition techniques can be roughly classed as either physical vapor deposition (PVD) or Chemical Vapor Deposition (CVD) techniques. PVD processes include such processes as evaporation and re-condensation, wherein a material, typically a metal, is heated to a temperature at which the metal melts and vaporizes. The metal then condenses on surfaces generally in line-of-sight of the evaporation, forming a film.
Another PVD process is the well-known sputtering process, wherein a plasma of usually an inert gas is formed near a target material, and the target is biased to attract ions from the plasma to bombard the target. Atoms of the target material are dislodged by momentum transfer, and form an atomic flux of particles which coalesce on surrounding surfaces generally in line-of-sight of the target surface eroded by the sputtering process.
PVD processes have distinct advantages for some processes, such as high rate of deposition, and relatively simple coating apparatus. There are drawbacks as well, notably an inherent inability to provide adequate step coverage. That is, on surfaces having concavities as a result of previous coating and etching steps, PVD processes are heir to shadowing effects resulting in local non-uniformity of coating thickness. This problem has grown in importance as device density has increased and device geometry has diminished in size.
CVD processes comprise deposition from gases injected into a processing chamber, typically at very low pressure compared to atmospheric pressure. In these processes, one or more materials that are components of one or more gaseous precursors are caused to deposit on a substrate through chemical decomposition and/or recombination. Energy input by heat, sometimes augmented by plasma power are used to drive the chemical reactions that result in deposition.
Many materials may be deposited by CVD techniques, but the field is limited to those materials which may be introduced to a chamber as either a gas or a vapor. For example, a film of metallic tungsten may be deposited on a heated substrate surface by flowing tungsten hexafluoride (WF.sub.6) to the surface in conjunction with a reducing gas, such a hydrogen. The resulting chemical reaction at a hot substrate surface reduces the WF.sub.6, leaving a film of tungsten on the substrate and producing HF gas. Tungsten is used in semiconductor manufacturing as a contact film between transistor gates and interconnect traces.
In other well-known CVD processes silicon is provided as silane (SiH.sub.4), disilane (Si.sub.2 H.sub.6), or as dichlorosilane (SiH.sub.2 Cl.sub.2) along with WF.sub.6 to produce a film of tungsten silicide (W.sub.x Si.sub.y), which is a preferred film for contacts. The present invention has particular relevance to tungsten silicide films.
Low resistivity for electrical contacts at devices in semiconductor circuitry, and low film stress are both highly desirable characteristics for CVD deposited tungsten silicide films. Unfortunately, deposition conditions that promote low resistivity do not necessarily promote low stress, and vice-versa.
Resistivity and film stress before and after anneal depend on a number of variables, such as hearth and substrate temperature in a CVD reactor, plasma power (if used), silicon-to-tungsten ratio in the as-deposited film, chamber pressure during deposition, flow rates and ratio of gases during deposition steps, anneal time and temperature, and much more. These variables and the results of varying them are relatively well known in the art after several years of depositing tungsten silicide, and competitive edges in general are typically accomplished by different manufacturers of CVD reactors and by manufacturers of integrated circuits (ICs), which manufacturers use the CVD reactors, by developing methods and hardware for precisely controlling the variables.
Still, even though the variables are well-known and much experience has been gained by many with skill in the art, and many patents have been awarded, there are still subtle interdependencies among variables that remain to be thoroughly understood, and causes and effects that are perhaps not as well understood as previously supposed in the art. The present inventors believe they have discovered more than one such circumstance in the deposition of tungsten silicide, and have developed methods and apparatus to provide more desirable films under more favorable circumstances than were previously thought to be possible.
The process effects that the present inventors have discovered and documented, and the steps taken and the apparatus developed as a result, providing new and better equipment and processes, are detailed in full below, forming the basis of the embodiments of the present invention.